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CS5320 数据表(PDF) 42 Page - Applied Micro Circuits Corporation

部件名 CS5320
功能描述  PCI Match Maker, 3.3V
PDF  160 Pages
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制造商  AMCC [Applied Micro Circuits Corporation]
网页  http://www.amcc.com
标志 AMCC - Applied Micro Circuits Corporation

CS5320 数据表(HTML) 42 Page - Applied Micro Circuits Corporation

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S5320 – PCI Match Maker: PCI Configuration Registers
42
DS1656
AMCC Confidential and Proprietary
Revision 5.03 – June 14, 2006
Data Sheet
Latency Timer Register (LAT)
The latency timer defines the minimum amount of time
that a bus master can retain ownership of the PCI bus.
The S5320 is a target device requiring zero bus own-
ership time. The register is hardwired to zero.
Figure 13. Latency Timer Register
Register Name:
Latency Timer
Address Offset:
0Dh
Power-up value:
00h
Boot-load:
not used
Attribute:
Read Only
Size:
8 bits
00h
0
7



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