CS5320 datasheet(5/160 Pages) AMCC

5 / 160 page

S5320 – PCI Match Maker

Revision 5.03 – June 14, 2006

AMCC Confidential and Proprietary

DS1656

Data Sheet

TABLE OF CONTENTS

FEATURES .............................................................................................................................................................. 3

APPLICATIONS ...................................................................................................................................................... 3

ARCHITECTURAL OVERVIEW .............................................................................................................................. 3

ARCHITECTURAL OVERVIEW S5320 ................................................................................................................. 15

S5320 REGISTER ARCHITECTURE .................................................................................................................... 15

PCI Configuration Registers ............................................................................................................................ 15

PCI Bus Accessible Registers ......................................................................................................................... 15

Add-On Bus Accessible Registers ................................................................................................................... 15

SERIAL NON-VOLATILE INTERFACE ................................................................................................................ 15

MAILBOX OPERATION ........................................................................................................................................ 17

PASS-THRU OPERATION .................................................................................................................................... 17

PCI BUS SIGNALS ............................................................................................................................................... 21

ADD-ON BUS AND S5320 CONTROL SIGNALS ................................................................................................ 23

USER ADD-ON BUS PIN DESCRIPTIONS .......................................................................................................... 24

PCI CONFIGURATIONS REGISTERS .................................................................................................................. 29

Vendor Identification Register (VID) ................................................................................................................ 29

Device Identification Register (DID) ................................................................................................................ 30

PCI Command Register (PCICMD) ................................................................................................................. 31

PCI Status Register (PCISTS) ......................................................................................................................... 33

Revision Identification Register (RID) .............................................................................................................. 35

Class Code Register (CLCD) .......................................................................................................................... 36

Cache Line Size Register (CALN) ................................................................................................................... 41

Latency Timer Register (LAT) ......................................................................................................................... 42

Header Type Register (HDR) .......................................................................................................................... 43

Built-In Self-Test Register (BIST) .................................................................................................................... 44

Base Address Register (BADR) ...................................................................................................................... 45

Determining Base Address Size ...................................................................................................................... 45

Assigning the Base Address ............................................................................................................................ 45

Subsystem Vendor Identification Register (SVID) ........................................................................................... 50

Subsystem ID Register (SID) .......................................................................................................................... 51

Expansion ROM Base Address Register (XROM) .......................................................................................... 52

Interrupt Line Register (INTLN) ....................................................................................................................... 54

Interrupt Pin Register (INTPIN) ...................................................................................................................... 55

Minimum Grant Register (MINGNT) ................................................................................................................ 56

Maximum Latency Register (MAXLAT) ........................................................................................................... 57

OPERATION REGISTERS .................................................................................................................................... 59

PCI BUS OPERATION REGISTERS .................................................................................................................... 59

PCI Outgoing Mailbox Register (OMB) ............................................................................................................ 60

PCI Incoming Mailbox Register (IMB) ............................................................................................................. 61

PCI Mailbox Empty/full Status Register (MBEF) ............................................................................................. 62

PCI Interrupt Control/Status Register (INTCSR) ............................................................................................. 63

PCI Reset Control Register (RCR) .................................................................................................................. 65

PCI Pass-Thru Configuration Register (PTCR) ............................................................................................... 67

ADD-ON BUS OPERATION REGISTERS ............................................................................................................ 69

CS5320 数据表(PDF) 5 Page - Applied Micro Circuits Corporation

CS5320 数据表(HTML) 5 Page - Applied Micro Circuits Corporation

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