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ADV7342 数据表(PDF) 53 Page - Analog Devices |
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ADV7342 数据表(HTML) 53 Page - Analog Devices |
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53 / 88 page ![]() ADV7342/ADV7343 Rev. 0 | Page 53 of 88 ED/HD Sinc Compensation Filter Response Subaddress 0x33, Bit 3 The ADV7342/ADV7343 include a filter designed to counter the effect of sinc roll-off in DAC 1, DAC 2, and DAC 3 while operating in ED/HD mode. This filter is enabled by default. It can be disabled using Subaddress 0x33, Bit 3. The benefit of the filter is illustrated in Figure 66 and Figure 67. FREQUENCY (MHz) 0.5 –0.5 30 5 0 10 15 20 25 0.4 0.1 –0.2 –0.3 –0.4 0.3 0.2 0 –0.1 Figure 66. ED/HD Sinc Compensation Filter Enabled FREQUENCY (MHz) 0.5 –0.5 30 5 0 10 15 20 25 0.4 0.1 –0.2 –0.3 –0.4 0.3 0.2 0 –0.1 Figure 67. ED/HD Sinc Compensation Filter Disabled ED/HD TEST PATTERN COLOR CONTROLS Subaddress 0x36 to Subaddress 0x38 Three 8-bit registers at Subaddress 0x36 to Subaddress 0x38 are used to program the output color of the internal ED/HD test pattern generator (Subaddress 0x31, Bit 2 = 1), whether it be the lines of the cross hatch pattern or the uniform field test pattern. They are not functional as color controls for external pixel data input. The values for the luma (Y) and the color difference (Cr and Cb) signals used to obtain white, black, and saturated primary and complementary colors conform to the ITU-R BT.601-4 standard. Table 41 shows sample color values that can be programmed into the color registers when the output standard selection is set to EIA 770.2/EIA 770.3 (Subaddress 0x30, Bits[1:0] = 00). Table 41. Sample Color Values for EIA 770.2/EIA 770.3 ED/HD Output Standard Selection Sample Color Y Value Cr Value Cb Value White 235 (0xEB) 128 (0x80) 128 (0x80) Black 16 (0x10) 128 (0x80) 128 (0x80) Red 81 (0x51) 240 (0xF0) 90 (0x5A) Green 145 (0x91) 34 (0x22) 54 (0x36) Blue 41 (0x29) 110 (0x6E) 240 (0xF0) Yellow 210 (0xD2) 146 (0x92) 16 (0x10) Cyan 170 (0xAA) 16 (0x10) 166 (0xA6) Magenta 106 (0x6A) 222 (0xDE) 202 (0xCA) COLOR SPACE CONVERSION MATRIX Subaddress 0x03 to Subaddress 0x09 The internal color space conversion (CSC) matrix automatically performs all color space conversions based on the input mode programmed in the mode select register (Subaddress 0x01, Bits[6:4]). Table 42 and Table 43 show the options available in this matrix. An SD color space conversion from RGB-in to YPrPb-out is possible. An ED/HD color space conversion from RGB-in to YPrPb-out is not possible. Table 42. SD Color Space Conversion Options Input Output1 YPrPb/RGB Out (Reg. 0x02, Bit 5) RGB In/YCrCb In (Reg. 0x87, Bit 7) YCrCb YPrPb 1 0 YCrCb RGB 0 0 RGB YPrPb 1 1 RGB RGB 0 1 1 CVBS/YC outputs are available for all CSC combinations. Table 43. ED/HD Color Space Conversion Options Input Output YPrPb/RGB Out (Reg. 0x02, Bit 5) RGB In/YCrCb In (Reg. 0x35, Bit 1) YCrCb YPrPb 1 0 YCrCb RGB 0 0 RGB RGB 0 1 ED/HD Manual CSC Matrix Adjust Feature The ED/HD manual CSC matrix adjust feature provides custom coefficient manipulation for color space conversions and is used in ED and HD modes only. The ED/HD manual CSC matrix adjust feature can be enabled using Subaddress 0x02, Bit 3. Normally, there is no need to enable this feature because the CSC matrix automatically performs the color space conversion based on the input mode chosen (ED or HD) and the input and output color spaces selected (see Table 43). For this reason, the ED/HD manual CSC matrix adjust feature is disabled by default. |
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