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ADV7342 数据表(PDF) 30 Page - Analog Devices |
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ADV7342 数据表(HTML) 30 Page - Analog Devices |
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30 / 88 page ![]() ADV7342/ADV7343 Rev. 0 | Page 30 of 88 Table 17. Register 0x12 to Register 0x17 SR7 to Bit Number Reset SR0 Register Bit Description 7 6 5 4 3 2 1 0 Register Setting Value 0x12 Pixel Port Readback (S Bus) S[7:0] Readback. x x x x x x x x Read only 0xXX 0x13 Pixel Port Readback (Y Bus) Y[7:0] Readback. x x x x x x x x Read only 0xXX 0x14 Pixel Port Readback (C Bus) C[7:0] Readback. x x x x x x x x Read only 0xXX P_BLANK. x 0xXX P_VSYNC. x P_HSYNC. x S_VSYNC. x S_HSYNC. x SFL/MISO. x 0x16 Control Port Readback Reserved. 0 0 Read only Reserved. 0 0x00 0 Software Reset. 1 Writing a 1 resets the device; this is a self-clearing bit 0x17 Software Reset Reserved. 0 0 0 0 0 0 |
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