ADV7342 datasheet(19/88 Pages) AD

19 / 88 page

ADV7342/ADV7343

Rev. 0 | Page 19 of 88

Pin No.

Mnemonic

Input/

Output

Description

RSET2

This pin is used to control the amplitudes of the DAC 4, DAC 5, and DAC 6 outputs. A 4.12 kΩ

resistor must be connected from RSET2 to AGND.

45, 35

COMP1,

COMP2

Compensation Pins. Connect a 2.2 nF capacitor from both COMP pins to VAA.

44, 43, 42

DAC 1, DAC 2,

DAC 3

DAC Outputs. Full and low drive capable DACs.

39, 38, 37

DAC 4, DAC 5,

DAC 6

DAC Outputs. Low drive only capable DACs.

SCL/MOSI

Multifunctional Pin: I2C Clock Input/SPI Data Input.

SDA/SCLK

I/O

Multifunctional Pin: I2C Data Input/Output. Also, SPI clock input.

ALSB/SPI_SS

Multifunctional Pin: This signal sets up the LSB2 of the MPU I2C address. Also, SPI slave select.

VREF

Optional External Voltage Reference Input for DACs or Voltage Reference Output.

VAA

Analog Power Supply (3.3 V).

10, 56

VDD

Digital Power Supply (1.8 V). For dual-supply configurations, VDD can be connected to other 1.8 V

supplies through a ferrite bead or suitable filtering.

VDD_IO

Input/Output Digital Power Supply (3.3 V).

PVDD

PLL Power Supply (1.8 V). For dual-supply configurations, PVDD can be connected to other 1.8 V

supplies through a ferrite bead or suitable filtering.

EXT_LF1

External Loop Filter for On-Chip PLL 1.

EXT_LF2

External Loop Filter for On-Chip PLL 2.

PGND

PLL Ground Pin.

AGND

Analog Ground Pin.

11, 57

DGND

Digital Ground Pin.

GND_IO

Input/Output Supply Ground Pin.

1 ED = enhanced definition = 525p and 625p.

2 LSB = least significant bit. In the ADV7342, setting the LSB to 0 sets the I2C address to 0xD4. Setting it to 1 sets the I2C address to 0xD6. In the ADV7343, setting the

LSB to 0 sets the I2C address to 0x54. Setting it to 1 sets the I2C address to 0x56.

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