 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ADV7342 数据表(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7342 数据表(HTML) 12 Page - Analog Devices |
|
|
12 / 88 page  ADV7342/ADV7343 Rev. 0 | Page 12 of 88 CLKIN_A* Y7 TO Y0 *LUMA/CHROMA CLOCK RELATIONSHIP CAN BE INVERTED USING SUBADDRESS 0x01, BITS 1 AND 2. CONTROL OUTPUTS Cr2 Y2 Cb2 Y1 Cr0 Y0 Cb0 t9 t10 t12 t11 t12 t11 t14 t13 P_HSYNC, P_VSYNC, CONTROL INPUTS P_BLANK Figure 8. ED/HD-DDR Only, 8-Bit, 4:2:2 YCrCb (HSYNC/VSYNC) Pixel Input Mode (Input Mode 010) Y1 Cr0 Y0 Cb0 XY 00 00 3FF *LUMA/CHROMA CLOCK RELATIONSHIP CAN BE INVERTED USING SUBADDRESS 0x01, BITS 1 AND 2. CLKIN_A* Y7 TO Y0 CONTROL OUTPUTS t9 t10 t12 t11 t12 t11 t14 t13 Figure 9. ED/HD-DDR Only, 8-Bit, 4:2:2 YCrCb (EAV/SAV) Pixel Input Mode (Input Mode 010) t9 t10 t9 t10 t11 t11 Y0 Y1 Y2 Y3 Y4 Y5 ED/HD INPUT SD INPUT S7 TO S0 CLKIN_A Y2 Cb2 Y1 Cr0 Y0 Cb0 Cr4 Cb4 Cr2 Cb2 Cr0 Cb0 Cr2 Y6 Cb6 C7 TO C0 Y7 TO Y0 CLKIN_B P_HSYNC, P_VSYNC, CONTROL INPUTS P_BLANK S_HSYNC, S_VSYNC CONTROL INPUTS t12 t12 Figure 10. SD and ED/HD-SDR, 16-Bit, 4:2:2 ED/HD and 8-Bit, SD Pixel Input Mode (Input Mode 011) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
