| 数据搜索系统,热门电子元器件搜索 |
|
ADV7342 数据表(PDF) 13 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7342 数据表(HTML) 13 Page - Analog Devices |
|
13 / 88 page ![]() ADV7342/ADV7343 Rev. 0 | Page 13 of 88 Cr2 Cr2 Y2 Y1 Cr0 EH/HD INPUT SD INPUT Cb2 Y1 Cr0 S7 TO S0 CLKIN_A Y7 TO Y0 CLKIN_B P_HSYNC, P_VSYNC, CONTROL INPUTS P_BLANK S_HSYNC, S_VSYNC CONTROL INPUTS t9 t10 t9 t10 t12 t11 t12 t11 t12 t11 Y0 Cb0 Cb2 Cb0 Y0 Y2 Figure 11. SD and ED/HD-DDR, 8-Bit, 4:2:2 ED/HD and 8-Bit, SD Pixel Input Mode (Input Mode 100) CLKIN_A Y7 TO Y0 CONTROL OUTPUTS Y1 Cr0 Y0 Cb0 Cr2 Y2 Cb2 P_HSYNC, P_VSYNC, CONTROL INPUTS P_BLANK t9 t10 t12 t11 t13 t14 Figure 12. ED Only (at 54 MHz), 8-Bit, 4:2:2 YCrCb (HSYNC/VSYNC) Pixel Input Mode (Input Mode 111) t9 t11 t10 t12 t13 t14 CLKIN_A Y7 TO Y0 CONTROL OUTPUTS 3FF 00 00 XY Cb0 Y0 Cr0 Y1 Figure 13. ED Only (at 54 MHz), 8-Bit, 4:2:2 YCrCb (EAV/SAV) Pixel Input Mode (Input Mode 111) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |