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CS43L21 数据表(PDF) 47 Page - Cirrus Logic

部件名 CS43L21
功能描述  Low Power, Stereo Digital to Analog Converter
PDF  63 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L21 数据表(HTML) 47 Page - Cirrus Logic

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DS723A1
47
CS43L21
6.10
Beep Configuration & Tone Configuration (Address 14h)
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
Repeat Beep (REPEAT)
Default: 0
0 - Disabled
1 - Enabled
Function:
This bit is used in conjunction with the BEEP bit to mix a continuous or periodic beep with the analog output.
Refer to Figure 10 on page 26 for a description of each configuration option.
Beep (BEEP)
Default: 0
0 - Disabled
1 - Enabled
Function:
This bit is used in conjunction with the REPEAT bit to mix a continuous or periodic beep with the analog
output. Note: Re-engaging the beep before it has completed its initial cycle will cause the beep signal to
remain ON for the maximum ONTIME duration. Refer to Figure 10 on page 26 for a description of each con-
figuration option.
Treble Corner Frequency (TREB_CF[1:0])
Default: 00
00 - 5 kHz
01 - 7 kHz
10 - 10 kHz
11 - 15 kHz
Function:
The treble corner frequency is user selectable as shown above.
Bass Corner Frequency (BASS_CF[1:0])
Default: 00
00 - 50 Hz
01 - 100 Hz
10 - 200 Hz
11 - 250 Hz
Function:
The bass corner frequency is user-selectable as shown above.
7
6
5
432
10
REPEAT
BEEP
Reserved
TREB_CF1
TREB_CF0
BASS_CF1
BASS_CF0
TC_EN



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