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CS43L21 数据表(PDF) 53 Page - Cirrus Logic

部件名 CS43L21
功能描述  Low Power, Stereo Digital to Analog Converter
PDF  63 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L21 数据表(HTML) 53 Page - Cirrus Logic

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DS723A1
53
CS43L21
Signal Processing Engine Overflow (SPEX_OVFL)
Default: 0
Function:
Indicates a digital overflow condition within the data path after the signal processing engine.
PCMX Overflow (PCMX_OVFL)
Default: 0
Function:
Indicates a digital overflow condition within the data path of the PCM mix.
6.18
Charge Pump Frequency (Address 21h)
Charge Pump Frequency (CHRG_FREQ[3:0])
Default: 0101
Function:
Alters the clocking frequency of the charge pump in 1/(N+2) fractions of the DAC oversampling rate, 128Fs,
should the switching frequency interfere with other system frequencies such as those in the AM radio band.
Note:
Distortion performance may be affected.
7
6
5
432
10
CHRG_FREQ
3
CHRG_FREQ
2
CHRG_FREQ
1
CHRG_FREQ
0
Reserved
Reserved
Reserved
Reserved
N
CHRG_FREQ[3:0]
Frequency
0
0000
...
...
15
1111
64xFs
N2
+
-----------------



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