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CS43L21 数据表(PDF) 44 Page - Cirrus Logic

部件名 CS43L21
功能描述  Low Power, Stereo Digital to Analog Converter
PDF  63 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L21 数据表(HTML) 44 Page - Cirrus Logic

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44
DS723A1
CS43L21
Soft Ramp
Soft Ramp allows level changes, either by gain changes, attenuation changes or muting, to be implemented
by incrementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 0.5 dB per 4
left/right clock periods.
Soft Ramp on Zero Crossing
This setting dictates that signal-level changes, either by gain changes, attenuation changes or muting, will
occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will occur
after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if
the signal does not encounter a zero crossing. The zero cross function is independently monitored and im-
plemented for each channel. Note: The LIM_SRDIS bit is ignored.
6.7
PCMX Mixer Volume Control:
PCMA (Address 10h) & PCMB (Address 11h)
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
PCMX Mixer Channel Mute (MUTE_PCMMIXX)
Default = 1
0 - Disabled
1 - Enabled
Function:
The PCM channel X input to the output mixer will mute when enabled. The muting function is affected by
the DACX Soft and Zero Cross bits (DACX_SZC[1:0]).
PCMX Mixer Volume Control (PCMMIXX_VOL[6:0])
Default: 000 0000
Function:
The level of the PCMX input to the output mixer can be adjusted in 0.5 dB increments as dictated by the
DACX Soft and Zero Cross bits (DACX_SZC[1:0]) from +12 to -51.5 dB. Levels are decoded as described
in the table above.
7
6
5
43210
MUTE_
PCMMIXx
PCMMIXx_
VOL6
PCMMIXx_
VOL5
PCMMIXx_
VOL4
PCMMIXx_
VOL3
PCMMIXx_
VOL2
PCMMIXx_
VOL1
PCMMIXx_
VOL0
Binary Code
Volume Setting
001 1000
+12.0 dB
···
···
000 0000
0 dB
111 1111
-0.5 dB
111 1110
-1.0 dB
···
···
001 1001
-51.5 dB



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