CS43L21 datasheet(49/63 Pages) CIRRUS

49 / 63 page

DS723A1

CS43L21

6.12

AOUTx Volume Control:

AOUTA (Address 16h) & AOUTB (Address 17h)

Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.

AOUTX Volume Control (AOUTX_VOL[7:0])

Default = 00h

Function:

The analog output levels can be adjusted in 0.5 dB increments from +12 to -102 dB as dictated by the DAC

Soft and Zero Cross bits (DACX_SZC[1:0]). Levels are decoded in unsigned binary as described in the table

above.

Note:

When the limiter is enabled, the AOUT Volume is automatically controlled and should not be ad-

justed manually. Alternative volume control may be achieved using the PCMMIXx_VOL[6:0] bits.

6.13

PCM Channel Mixer (Address 18h)

Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.

Channel Mixer (PCMx[1:0])

Default: 00

Function:

Implements mono mixes of the left and right channels as well as a left/right channel swap.

432

AOUTx_VOL7 AOUTx_VOL6 AOUTx_VOL5 AOUTx_VOL4 AOUTx_VOL3 AOUTx_VOL2 AOUTx_VOL1 AOUTx_VOL0

Binary Code

Volume Setting

0001 1000

+12.0 dB

···

0000 0000

0 dB

1111 1111

-0.5 dB

1111 1110

-1.0 dB

···

0011 0100

-102 dB

···

0001 1001

-102 dB

432

PCMA1

PCMA0

PCMB1

PCMB0

Reserved

PCMA[1:0]

AOUTA

PCMB[1:0]

AOUTB

------------

CS43L21 数据表(PDF) 49 Page - Cirrus Logic

CS43L21 数据表(HTML) 49 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

数据表下载