CS43L21 datasheet(23/63 Pages) CIRRUS

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DS723A1

CS43L21

4.2

Hardware Mode

A limited feature-set is available when the D/A powers up in Hardware Mode (see “Recommended Power-

Up Sequence” section on page 31) and may be controlled via stand-alone control pins. Table 2 shows a list

of functions/features, the default configuration and the associated stand-alone control available.

Hardware Mode Feature/Function Summary

Feature/Function

Default Configuration

Stand-Alone Control

Note

Power Control

Device

DACx

Powered Up

Auto-Detect

Enabled

Speed Mode

Serial Port Slave

Serial Port Master

Auto-Detect Speed Mode

Single-Speed Mode

MCLK Divide

(Selectable)

“MCLKDIV2” pin 2

see Section

4.4 on page 28

Serial Port Master / Slave Selection

(Selectable)

“M/S” pin 29

see Section

4.4 on page 28

Interface Control

DAC

(Selectable)

“I²S/LJ” pin 3

see Section

4.5 on page 30

DAC Volume & Gain

HP Gain

AOUTx Volume

Invert

Soft Ramp

Zero Cross

G = 0.6047

0 dB

Disabled

Enabled

Disabled

DAC De-Emphasis

(Selectable)

“DEM” pin 4

see Section

on page 24

Signal Processing Engine (SPE)

Mix

Beep

Tone Control

Peak Detect and Limiter

Disabled

Data Selection

Data Input (PCM) to DAC

Channel Mix

DAC

PCMA = L; PCMB = R

Charge Pump Frequency

(64xFs)/7

Table 2. Hardware Mode Feature Summary

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