CS43L21 datasheet(10/63 Pages) CIRRUS

10 / 63 page

DS723A1

CS43L21

+1.8V or +2.5V

1 µF

FILT+

0.1 µF

1 µF

DGND

0.1 µF

+1.8V, 2.5 V

or +3.3V

I²S/LJ

MCLKDIV2

RESET

LRCK

AGND

DEM

MCLK

SCLK

0.1 µF

VA_HP

SDIN

CS43L21

1 µF

+1.8V or +2.5V

AOUTB

AOUTA

470

Ω

470

Ω

Rext

See Note 2

For best response to Fs/2 :

()

470

ext

This circuitry is intended for applications where the CS 43L21 connects directly to an unbalanced output of the device . For

internal routing applications please see the DAC Analog Output Characteristics section for loading limitations .

Note 2 :

Digital Audio

Processor

0.1 µF

Headphone Out

Left & Right

Line Level Out

Left & Right

Speaker Driver

FLYP

FLYN

VSS_HP

GND_HP

51.1

Ω

0.022 µF

1 µF

See Note 1

Note 1:

Series resistance in the path of the power supplies (typically

used for added filtering) must be avoided. Any voltage drop

on VA_HP will directly impact the negative charge pump

supply (VSS_HP) and result in clipping on the audio output .

1 µF

* *Use low ESR ceramic capacitors.

See Note 3

Note 3:

Pull-up to VL (47 k

Ω for Master Mode. Pull-

down to DGND for Slave Mode.

47 k

Ω

TSTO/M/S

VL or DGND

Ω

Figure 2. Typical Connection Diagram (Hardware Mode)

CS43L21 数据表(PDF) 10 Page - Cirrus Logic

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