数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

CS43L21 数据表(PDF) 41 Page - Cirrus Logic

部件名 CS43L21
功能描述  Low Power, Stereo Digital to Analog Converter
PDF  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L21 数据表(HTML) 41 Page - Cirrus Logic

Back Button CS43L21 Datasheet HTML 37Page - Cirrus Logic CS43L21 Datasheet HTML 38Page - Cirrus Logic CS43L21 Datasheet HTML 39Page - Cirrus Logic CS43L21 Datasheet HTML 40Page - Cirrus Logic CS43L21 Datasheet HTML 41Page - Cirrus Logic CS43L21 Datasheet HTML 42Page - Cirrus Logic CS43L21 Datasheet HTML 43Page - Cirrus Logic CS43L21 Datasheet HTML 44Page - Cirrus Logic CS43L21 Datasheet HTML 45Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 63 page
background image
DS723A1
41
CS43L21
Function:
Divides the input MCLK by 2 prior to all internal circuitry. This bit is ignored when the AUTO bit is disabled
in Slave Mode.
6.4
Interface Control (Address 04h)
Master/Slave Mode (M/S)
Default: 0
0 - Slave
1 - Master
Function:
Selects either master or slave operation for the serial port.
DAC Digital Interface Format (DAC_DIF[2:0])
Default = 000
Function:
Selects the digital interface format used for the data in on SDIN. The required relationship between the
Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and the options are
detailed in the section “Digital Interface Formats” on page 30.
6.5
DAC Output Control (Address 08h)
Headphone Analog Gain (HP_GAIN[2:0])
Default: 011
7
6
5
432
10
Reserved
M/S
DAC_DIF2
DAC_DIF1
DAC_DIF0
Reserved
Reserved
Reserved
DAC_DIF[2:0]
Description
Figure
000
Left-Justified, up to 24-bit data
15 on page 31
001
I²S, up to 24-bit data
14 on page 30
010
Right-Justified, 24-bit data
17 on page 3217 on page 32
011
Right-Justified, 20-bit data
17 on page 3217 on page 32
100
Right-Justified, 18-bit data
17 on page 3217 on page 32
101
Right-Justified, 16-bit data
17 on page 3217 on page 32
110
Reserved
-
100
Reserved
-
7
6
5
432
10
HP_GAIN2
HP_GAIN1
HP_GAIN0
DAC_
SNGVOL
INV_PCMB
INV_PCMA
DACB_MUTE DACA_MUTE
HP_GAIN[2:0]
Gain Setting
000
0.3959
001
0.4571
010
0.5111
011
0.6047
100
0.7099
101
0.8399
110
1.0000
111
1.1430



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com