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M58LR128HT 数据表(PDF) 104 Page - STMicroelectronics |
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M58LR128HT 数据表(HTML) 104 Page - STMicroelectronics |
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104 / 112 page  Command interface state tables M58LR128HT, M58LR128HB 104/112 Blank Check Setup Ready (error) Blank Check busy Ready (error) Busy Blank Check busy IS in Blank Check busy Blank Check busy IS in Blank Check busy Blank Check busy Lock/CR Setup in Erase Suspend Erase Suspend (Lock Error) Erase Suspend Erase Suspend (Lock Error) Buffer EFP Setup Ready (error) BEFP Busy Ready (error) Busy BEFP Busy(6) 1. CI = Command Interface, CR = Configuration register, BEFP = Buffer Enhanced Factory program, P/E C = Program/Erase controller, IS = Illegal State, BP = Buffer Program, ES = Erase Suspend. 2. At power-up, all banks are in Read Array mode. Issuing a Read Array command to a busy bank, results in undetermined data output. 3. The two cycle command should be issued to the same bank address. 4. If the P/E C is active, both cycles are ignored. 5. The Clear Status Register command clears the SR error bits except when the P/E C. is busy or suspended. 6. BEFP is allowed only when Status Register bit SR0 is reset to '0'. BEFP is busy if Block Address is first BEFP Address. Any other commands are treated as data. Table 42. Command Interface states - modify table, next state(1) (continued) Current CI State Command Input Read Array(2) (FFh) Program Setup(3)(4) (10/40h) Buffer Program (3)(4) (E8h) Block Erase, Setup(3)(4) (20h) BEFP Setup (80h) Blank Check setup (BCh) Erase Confirm P/E Resume, Block Unlock confirm, BEFP Confirm(3)(4) (D0h) Blank Check confirm (CBh) Buffer Program, Program/ Erase Suspend (B0h) Read Status Register (70h) Clear Status Register (5) (50h) Read Electronic Signature , Read CFI Query (90h, 98h) |
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