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AM29BDD160G 数据表(PDF) 66 Page - Advanced Micro Devices |
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AM29BDD160G 数据表(HTML) 66 Page - Advanced Micro Devices |
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66 / 79 page  64 Am29BDD160G June 7, 2006 AC CHARACTERISTICS Erase/Program Operations Notes: 1. Not 100% tested. 2. See the section for more information. Parameter All Speed Options JEDEC Std. Description Unit tAVAV tWC Write Cycle Time (Note 1) Min60 ns tAVWL tAS Address Setup Time Min0 ns tWLAX tAH Address Hold Time Min25 ns tDVWH tDS Data Setup to WE# Rising Edge Min15 ns tWHDX tDH Data Hold from WE# Rising Edge Min2 ns tOES Output Enable Setup Time Min0 ns t GHWL t GHWL Read Recovery Time Before Write (OE# High to WE# Low) Min0 ns t ELWL t CS CE# Setup Time Min0 ns t WHEH t CH CE# Hold Time Min0 ns CE# Setup to CLK Min7 t WLWH t WP WE# Width Min25 ns t WHWL t WPH Write Pulse Width High Min 30ns t WHWH1 t WHWH1 Programming Operation (Note 2) Typ 9µs t WHWH2 t WHWH2 Sector Erase Operation (Note 2) Typ 0.5 sec. t VCS V CC Setup Time (Note 1) Min50 µs t RB Recovery Time from RY/BY# Min0 ns t BUSY RY/BY# Delay After WE# Rising Edge Max 90ns t WPWS WP# Setup to WE# Rising Edge with Command Min20 ns t WPRH WP# Hold after RY/BY# Rising Edge Max2 ns |
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