AM29BDD160G datasheet(78/79 Pages) AMD

78 / 79 page

Am29BDD160G

June 7, 2006

Sector Erase and Program Suspend Operation

Mechanics

Added bulleted section.

Absolute Maximum Ratings and Operating Ranges

Added V

Changed 1.65 V to –0.5 V

Changed 2.3 V to 2.5 V

CMOS Compatible

Removed “V

IO” from Max column of output high volt-

age row.

Figure 16. Burst Mode Read (x32 mode)

Corrected typos to subscripts.

Corrected values for the t

BACC and tDIND for the 54D,

65D, 64C, and 80C speed options.

Figure 17. Asynchronous Command Write Timing

Added t

WC and tWPH.

Figure 18. Synchronous Command Write/ Read

Timing

Added t

WC and tWPH.

Hardware Reset (RESET#)

Corrected t

READY max.

Figure 20. WP# Write Timing

Added t

WP.

Figure 23. Back-to-back Cycle Timings

Added t

WPH.

Figure 24. Data# Polling Timings (During

Embedded Algorithms)

Added t

WC.

Figure 29. Alternate CE# Controlled Write

Operation Timings

Added t

WP and tWPH

Erase and Programming Performance

Changed the sector erase time typical to 1.0.

Revision B+5 (May 6, 2003)

Global

Converted data sheet from Advanced Information to

Preliminary.

Ordering Information

Removed some OPNs and markings.

Automatic Sleep Mode (ASM) and Standby Mode

Reworded first paragraph.

DQ7: Data# Polling, DQ6: Toggle Bit I and DQ2:

Toggle Bit II

Added reference to Figure 27.

Absolute Maximum Ratings

Added ACC reference.

CMOS Compatible

Corrected Max values for the I

CC5, 7, and 8

Added Note #5.

Figure 27. Synchronous Data Polling

Timings/Toggle Bit Timing

Added Figure.

Simultaneous Read/Write Operations Overview

and Restrictions

Added Sections and table.

Table 7. Burst Initial Access Delay, Table 8.

Configuration Register Definitions, Table 23. Test

Specifications, Asynchronous Read Operations,

and Burst Mode Read

Removed the 65D, 80C, and 90A speed options from

tables.

Revision C (May 19, 2003)

No revisions made, repost on web.

Revision C+1 (May 29, 2003)

Distinctive Characteristics

Changed the standby mode to 60

μA.

Product Selector Guide

Changed the standard voltage range to 2.5-2.75 V

Output Disable Mode

Replace paragraph.

Synchronous (Burst) Read Operation

Removed reference to “continuous sequential” from

section.

Figure 3. Initial Burst Delay Control

Renumbered waveform to read two, three, four.

Toggle Bit I

Added sentence to second paragraph of section.

CMOS Compatible

Removed reference to continuous burst from table.

Burst Mode Read

Changed the t

IACC Max for the 65A speed option to 67

ns.

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