TMP93CS41 datasheet(161/248 Pages) TOSHIBA

161 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-159

Figure 3.10.7 Connection between Timer and Pattern Generator

(1) Pattern generation mode

When PG01CR<PAT0>

= “1”, PG functions as a pattern generator. In this mode data is

written from the CPU to the shift alternate register only. The pattern data is then written

from the shift alternate register to the pattern generator register synchronized to the shift

trigger interrupt from the timer.

In this mode, PG01CR<PG0M> should be set to “1”, PG01CR<CCW0> to “0”, and

PG01CR<PG0TE> to “1”.

The output from the pattern generator goes to port 6; since port or functions can be

switched by the bit settings in the port function control register, P6FC, any port pin can be

assigned to pattern generator output.

Figure 3.10.8 shows the block diagram for this mode.

Example of Pattern Generation Mode

8-bit timer

(Timers 0 and 1)

16-bit timer 4

16-bit timer 5

Select

<PG0T>

<PG1T>

PG0

PG1

Port 60 to 63

Port 64 to 67

+ 1

+ 2

+ 3

− 1

Trigger signal from timer/

timer interrupt

Shift alternate register

output

(SA03 to SA00)

Pattern generator

(PG03 to PG00)

+ 1

+ 2

− 1

Shifting data from

SA03 to 00 to PG03 to PG00

Writing data to SA03 to SA00 on

timer interrupt

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