| 数据搜索系统,热门电子元器件搜索 |
|
TMP93CS41 数据表(PDF) 162 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP93CS41 数据表(HTML) 162 Page - Toshiba Semiconductor |
|
162 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-160 Figure 3.10.8 Pattern Generation Mode Block Diagram (PG0) In pattern generation mode, only writing to the output latch can be disabled by hardware. All other functions behave in the same way as 1 to 2 step excitation in stepping motor control port mode. Hence, data shifted on the trigger signal from a timer must be written before the next trigger signal is output. Shift alternate register PG03 (P63) BUS3 PG02 (P62) BUS2 PG01 (P61) BUS1 PG00 (P60) BUS0 Shift performed on shift trigger from timer SA03 PG03 PG02 SA02 PG01 SA01 PG00 SA00 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |