AD4052BCPZ-R2 datasheet(36/66 Pages) AD

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Data Sheet

AD4052/AD4058

MODES OF OPERATION

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Rev. B | 36 of 66

Trigger Mode

In trigger mode, threshold crossings trigger the AD4052/AD4058 to

automatically perform a 16-bit conversion of the input signal and

transition into sample mode. The corresponding alert signals and

status bits are asserted to send an interrupt to the digital host.

The host can then read the 16-bit result from the SPI as described

in the sample mode section or from the MAX_SAMPLE_REG or

MIN_SAMPLE_REG registers in configuration mode.

Figure 62 shows a flowchart for register configuration, the com-

parison sequence operations, and the behavior of the hardware

interrupts and alert flags following threshold crossings in trigger

mode. Table 16 lists the configuration register settings to select

trigger mode.

When a maximum or minimum crossing is detected, the MAX_INTR

or MIN_INTR signal asserts, respectively. The internal timer is

disabled to stop autonomous sampling, and the ADC core powers

up to convert the input signal. Figure 64 shows a timing diagram

for the threshold detection and ADC sampling in trigger mode.

Following the threshold event, the firmware can either continue

operating the AD4052/AD4058 in sample mode to perform more

conversions, or the firmware can send the exit command to put the

device into configuration mode and read the alert registers. The

MAX_INTR and MIN_INTR signals hold their states until the host

sends the exit command to transition to register mode.

Note that following the transition to sample mode, the ADC_MODE

bit field in the register map is internally overwritten to 2’h0 and must

be rewritten to 2’h3 to reenter autonomous mode.

The MAX_FLAG or MIN_FLAG bit is also asserted when

MAX_INTR or MIN_INTR asserts, respectively. The MAX_FLAG

and MIN_FLAG bits are sticky and do not clear until the host sets

them to 1’b1 with a register write. It is recommended to reset the

MAX_FLAG and MIN_FLAG bits after sending the exit command

and before returning to autonomous mode.

Figure 62. Trigger Mode Flowchart

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