PIC16F753 datasheet(182/230 Pages) MICROCHIP

182 / 230 page

PIC16F753/HV753

DS40001709C-page 182

 2013-2015 Microchip Technology Inc.

Capacitive Loading Specs on Output Pins

D101*

COSC2

OSC2 pin

—

In XT, HS, LP modes when

external clock is used to drive

OSC1

D101A*

CIO

All I/O pins

—

TABLE 22-5:

MEMORY PROGRAMMING SPECIFICATIONS

Standard Operating Conditions (unless otherwise stated)

Param.

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

Program Memory

Programming Specifications

D110

VIHH

Voltage on MCLR/VPP pin

10.0

—

13.0

(Note 2)

D112

VBE

VDD for Bulk Erase

4.5

—

VDDMAX

D113

VPEW

VDD for Write or Row Erase

4.5

—

VDDMAX

D114

IPPPGM

Current on MCLR/VPP during

Erase/Write

—

300

1000

A

Program Flash Memory

D121

Cell Endurance

10K

100K

—

E/W

-40

C  TA +85C

(Note 1)

D121A

Cell Endurance

10K

—

E/W

-40

C  TA +125C

(Note 1)

D122

VPRW

VDD for Read/Write

VDDMIN

—VDDMAX

D123

TIW

Self-timed Write Cycle Time

—

2.5

D124

TRETD

Characteristic Retention

—

Year

Provided no other

specifications are violated

D125

EHEFC

High-Endurance Flash Cell

N/A

—

E/W

0°C to +60°C, Lower byte

last 128 addresses

† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1:

Self-write and Block Erase.

Required only if single-supply programming is disabled.

TABLE 22-4:

I/O PORTS (CONTINUED)

DC CHARACTERISTICS

Standard Operating Conditions (unless otherwise stated)

Param

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

These parameters are characterized but not tested.

†

Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

Note

Negative current is defined as current sourced by the pin.

The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent

normal operating conditions. Higher leakage current may be measured at different input voltages.

This specification applies to all weak pull-up pins, including the weak pull-up found on RA3/MCLR. When RA3/MCLR is

configured as MCLR Reset pin, the weak pull-up is always enabled.

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