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PIC16F753 数据表(PDF) 161 Page - Microchip Technology |
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PIC16F753 数据表(HTML) 161 Page - Microchip Technology |
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161 / 230 page  2013-2015 Microchip Technology Inc. DS40001709C-page 161 PIC16F753/HV753 FIGURE 19-8: INT PIN INTERRUPT TIMING TABLE 19-6: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page INTCON GIE PEIE T0IE INTE IOCIE T0IF INTF IOCIF 17 IOCAF — — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 45 IOCAN — — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 45 IOCAP — — IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 45 LATA — —LATA5 LATA4 — LATA2 LATA1 LATA0 43 PIE1 TMR1GIE ADIE — — HLTMR2IE HLTMR1IE TMR2IE TMR1IE 18 PIR1 TMR1GIF ADIF — — HLTMR2IF HLTMR1IF TMR2IF TMR1IF 20 Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition. Shaded cells are not used by the interrupt module. Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 CLKIN CLKOUT INT pin INTF flag (INTCON reg.) GIE bit (INTCON reg.) INSTRUCTION FLOW PC Instruction Fetched Instruction Executed Interrupt Latency PC PC + 1 PC + 1 0004h 0005h Inst (0004h) Inst (0005h) Dummy Cycle Inst (PC) Inst (PC + 1) Inst (PC – 1) Inst (0004h) Dummy Cycle Inst (PC) — Note 1: INTF flag is sampled here (every Q1). 2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction. 3: CLKOUT is available only in INTOSC and RC Oscillator modes. 4: For minimum width of INT pulse, refer to AC specifications in Section 22.0 “Electrical Specifications”. 5: INTF is enabled to be set any time during the Q4-Q1 cycles. (1) (2) (3) (4) (5) (1) |
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