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DP83867CS 数据表(PDF) 20 Page - Texas Instruments |
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DP83867CS 数据表(HTML) 20 Page - Texas Instruments |
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20 / 129 page  7.3 Feature Description 7.3.1 WoL (Wake-on-LAN) Packet Detection Wake-on-LAN provides a mechanism for bringing the DP83867 out of a low-power state using a special Ethernet packet called a Magic Packet. The DP83867 can be configured to generate an interrupt to wake up the MAC when a qualifying packet is received. An option is also available to generate a signal on a GPIO when a qualifying signal is received. Further Note Please confirm that BMCR (register address 0x0000) bit[10] is disabled, when using the WoL feature. This bit enables the MII ISOLATE function used to disable the MAC interface of the PHY, also disabling the WoL interrupt on this PHY. If the WoL feature is needed while MII ISOLATE is enabled please use TI's DP83869HM PHY instead. The Wake-on-LAN feature includes the following functionality: • Identification of magic packets in all supported speeds (1000BASE-T, 100BASE-TX, 10BASE-Te) • Wakeup interrupt generation upon receiving a valid magic packet • CRC checking of magic packets to prevent interrupt generation for invalid packets In addition to the basic magic packet support, the DP83867 also supports: • Magic packets that include secure-on password • Pattern match – one configurable 64 byte pattern of that can wake up the MAC similar to magic packet Note DP838xx Wake-on-LAN document provide more detail on Wake-on-LAN 7.3.1.1 Magic Packet Structure When configured for Magic Packet mode, the DP83867 scans all incoming frames addressed to the node for a specific data sequence. This sequence identifies the frame as a Magic Packet frame. Note The Magic Packet must be byte aligned. A Magic Packet frame must also meet the basic requirements for the LAN technology chosen, such as SOURCE ADDRESS, DESTINATION ADDRESS (which can be the receiving station’s IEEE address). DP83867PHY support Unicast onlyfor Magic Packet Detection. The specific Magic Packet sequence consists of 16 duplications of the IEEE address of this node, with no breaks or interruptions, followed by secure-on password if security is enabled. This sequence can be located anywhere within the packet, but must be preceded by a synchronization stream. The synchronization stream is defined as 6 bytes of FFh. DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 20 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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