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DP83867CS 数据表(PDF) 14 Page - Texas Instruments

部件名 DP83867CS
功能描述  DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
PDF  129 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

DP83867CS 数据表(HTML) 14 Page - Texas Instruments

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T4
T2
32
CLOCKS
T3
Output
Input
VDD
XI clock
Hardware
RESET_N
MDC
Latch-In of Hardware
Configuration Pins
Dual Function Pins
Become Enabled As Outputs
T1
Figure 6-2. Reset Timing
MDC
MDIO
(output)
MDC
MDIO
(input)
T4
T1
Valid Data
T2
T3
Figure 6-3. MII Serial Management Timing
SG_RXCK
(single ended)
SG_RXCK
(differential)
SG_RXDA
(single ended)
SG_RXDA
(differential)
T3 (min)
tT1t
tT2t
T3 (max)
Figure 6-4. SGMII Timing
DP83867CS, DP83867IS, DP83867E
SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025
www.ti.com
14
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: DP83867CS DP83867IS DP83867E



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