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DP83867CS 数据表(PDF) 6 Page - Texas Instruments |
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DP83867CS 数据表(HTML) 6 Page - Texas Instruments |
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6 / 129 page  Table 5-1. Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME NO. LED_0 47 S, I/O, PD LED_0: By default, this pin indicates that link is established. Additional functionality is configurable through LEDCR1[3:0] register bits. MEDIA DEPENDENT INTERFACE TD_P_A 1 A Differential Transmit and Receive Signals TD_M_A 2 A Differential Transmit and Receive Signals TD_P_B 4 A Differential Transmit and Receive Signals TD_M_B 5 A Differential Transmit and Receive Signals TD_P_C 7 A Differential Transmit and Receive Signals TD_M_C 8 A Differential Transmit and Receive Signals TD_P_D 10 A Differential Transmit and Receive Signals TD_M_D 11 A Differential Transmit and Receive Signals OTHER PINS RBIAS 12 A Bias Resistor Connection. A 11kΩ ±1% resistor can be connected from RBIAS to GND. POWER AND GROUND PINS VDDA2P5 3, 9 P 2.5V Analog Supply (±5%). Each pin requires a 1µF and 0.1µF capacitor to GND. VDD1P0 6, 24, 31, 42 P 1V Analog Supply (+15.5%, –5%). Each pin requires a 1µF and 0.1µF capacitor to GND. VDDA1P8 13, 48 P 1.8V Analog Supply (±5%). No external supply is required for this pin. When unused, no connections can be made to this pin. For additional power savings, an external 1.8V supply can be connected to these pins. When using an external supply, each pin requires a 1µF and 0.1µF capacitor to GND. VDDIO 19, 30, 41 P I/O Power: 1.8V (±5%), 2.5V (±5%) or 3.3V (±5%). Each pin requires a 1µF and 0.1µF capacitor to GND GND Die Attach Pad P Ground (1) The definitions below define the functionality of each pin. • Type: I Input • Type: O Output • Type: I/O Input/Output • Type: PD, PU Internal Pulldown/Pullup • Type: S Configuration Pin • Type: P Power or GND • Type: A Analog pins DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 6 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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