MPC8309CVMADFC datasheet(39/81 Pages) NXP

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MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3

Freescale Semiconductor

eSDHC

14 eSDHC

This section describes the DC and AC electrical specifications for the eSDHC interface of the device.

14.1

eSDHC DC Electrical Characteristics

The following table provides the DC electrical characteristics for the eSDHC interface.

14.2

eSDHC AC Timing Specifications

The following table provides the eSDHC AC timing specifications as defined in Figure 30 and Figure 31.

Table 39. eSDHC Interface DC Electrical Characteristics

At recommended operating conditions with OVDD =3.3 V

Characteristic

Symbol

Condition

Min

Max

Unit

Note

Input high voltage

VIH

—0.625

 OVDD

—V

Input low voltage

VIL

—

0.25

 OVDD

Output high voltage

VOH

IOH = –100 A at

OVDD min

0.75

 OVDD

—V

—

Output low voltage

VOL

IOL =100 A at

OVDD min

—0.125

 OVDD

V—

Output high voltage

VOH

IOH = –100 mA

OVDD –0.2

—

Output low voltage

VOL

IOL =2mA

—

0.3

Input/output leakage current

IIN/IOZ

—–10

A—

Notes:

1. Note that the min VILand max VIH values are based on the respective min and max OVIN values found in Table 2..

2. Open drain mode for MMC cards only.

Table 40. eSDHC AC Timing Specifications

At recommended operating conditions with OVDD =3.3 V

Parameter

Symbol1

Min

Max

Unit

Notes

SD_CLK clock frequency:

SD/SDIO Full-speed/High-speed mode

MMC Full-speed/High-speed mode

fSHSCK

25/33.25

20/52

MHz

2, 4

SD_CLK clock low time—Full-speed/High-speed mode

tSHSCKL

10/7

—

SD_CLK clock high time—Full-speed/High-speed mode

tSHSCKH

10/7

—

SD_CLK clock rise and fall times

tSHSCKR/

tSHSCKF

—3

Input setup times: SD_CMD, SD_DATx, SD_CD to

SD_CLK

tSHSIVKH

5—

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