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MPC8309CVMADFC 数据表(PDF) 49 Page - NXP Semiconductors |
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MPC8309CVMADFC 数据表(HTML) 49 Page - NXP Semiconductors |
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49 / 81 page ![]() MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3 Freescale Semiconductor 49 JTAG 21.2 JTAG AC Electrical Characteristics This section describes the AC electrical specifications for the IEEE Std. 1149.1 (JTAG) interface of the MPC8309. The following table provides the JTAG AC timing specifications as defined in Figure 40 through Figure 43. Input high voltage VIH —2.0 OVDD +0.3 V Input low voltage VIL —–0.3 0.8 V Input current IIN 0 V VIN OVDD —±5 A Table 54. JTAG AC Timing Specifications (Independent of SYS_CLK_IN)1 At recommended operating conditions (see Table 2). Parameter Symbol2 Min Max Unit Notes JTAG external clock frequency of operation fJTG 033.3 MHz — JTAG external clock cycle time t JTG 30 — ns — JTAG external clock pulse width measured at 1.4 V tJTKHKL 11 — ns — JTAG external clock rise and fall times tJTGR, tJTGF 02 ns — TRST assert time tTRST 25 — ns 3 Input setup times: Boundary-scan data TMS, TDI tJTDVKH tJTIVKH 4 4 — — ns 4 Input hold times: Boundary-scan data TMS, TDI tJTDXKH tJTIXKH 10 10 — — ns 4 Valid times: Boundary-scan data TDO tJTKLDV tJTKLOV 2 2 15 15 ns 5 Table 53. JTAG Interface DC Electrical Characteristics (continued) Characteristic Symbol Condition Min Max Unit |
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