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MPC8309CVMADFC 数据表(PDF) 45 Page - NXP Semiconductors

部件名 MPC8309CVMADFC
功能描述  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  81 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MPC8309CVMADFC 数据表(HTML) 45 Page - NXP Semiconductors

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MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
Freescale Semiconductor
45
GPIO
18 GPIO
This section describes the DC and AC electrical specifications for the GPIO of the MPC8309.
18.1
GPIO DC Electrical Characteristics
The following table provides the DC electrical characteristics for the MPC8309 GPIO.
18.2
GPIO AC Timing Specifications
The following table provides the GPIO input and output AC timing specifications.
The following figure provides the AC test load for the GPIO.
Figure 35. GPIO AC Test Load
Table 47. GPIO DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Notes
Output high voltage
VOH
IOH = –6.0 mA
2.4
V
1
Output low voltage
VOL
IOL = 6.0 mA
0.5
V
1
Output low voltage
VOL
IOL = 3.2 mA
0.4
V
1
Input high voltage
VIH
—2.0
OVDD +0.3
V
1
Input low voltage
VIL
—–0.3
0.8
V
Input current
IIN
0 V
VIN OVDD
±5
A—
Note:
1. This specification applies when operating from 3.3-V supply.
Table 48. GPIO Input AC Timing Specifications1
Characteristic
Symbol2
Min
Unit
GPIO inputs—minimum pulse width
tPIWID
20
ns
Notes:
1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of SYS_CLK_IN.
Timings are measured at the pin.
2. GPIO inputs and outputs are asynchronous to any visible clock. GPIO outputs should be synchronized before use by any
external synchronous logic. GPIO inputs are required to be valid for at least tPIWID ns to ensure proper operation.
Output
Z0 = 50 
OVDD/2
RL = 50 



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