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MPC8309CVMADFC 数据表(PDF) 46 Page - NXP Semiconductors |
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MPC8309CVMADFC 数据表(HTML) 46 Page - NXP Semiconductors |
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46 / 81 page ![]() MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3 46 Freescale Semiconductor IPIC 19 IPIC This section describes the DC and AC electrical specifications for the external interrupt pins of the MPC8309. 19.1 IPIC DC Electrical Characteristics The following table provides the DC electrical characteristics for the external interrupt pins of the MPC8309. 19.2 IPIC AC Timing Specifications The following table provides the IPIC input and output AC timing specifications. 20 SPI This section describes the DC and AC electrical specifications for the SPI of the MPC8309. 20.1 SPI DC Electrical Characteristics The following table provides the DC electrical characteristics for the MPC8309 SPI. Table 49. IPIC DC Electrical Characteristics1,2 Characteristic Symbol Condition Min Max Unit Input high voltage VIH —2.0 OVDD +0.3 V Input low voltage VIL —–0.3 0.8 V Input current IIN —— ±5 A Output High Voltage VOH IOL = -8.0 mA 2.4 — V Output low voltage VOL IOL = 6.0 mA — 0.5 V Output low voltage VOL IOL = 3.2 mA — 0.4 V Notes: 1. This table applies for pins IRQ, MCP_OUT, and QE ports Interrupts. 2. MCP_OUT is open drain pins, thus VOH is not relevant for those pins. Table 50. IPIC Input AC Timing Specifications1 Characteristic Symbol2 Min Unit IPIC inputs—minimum pulse width tPIWID 20 ns Notes: 1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of SYS_CLK_IN. Timings are measured at the pin. 2. IPIC inputs and outputs are asynchronous to any visible clock. IPIC outputs should be synchronized before use by any external synchronous logic. IPIC inputs are required to be valid for at least tPIWID ns to ensure proper operation when working in edge triggered mode. |
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