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ST10 数据表(PDF) 30 Page - STMicroelectronics |
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ST10 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 58 page ![]() ST10F163 30/58 S0TBIC b F19Ch E CEh Serial Channel 0 Transmit Buffer Interrupt Control Reg 0000h S0TBUF FEB0h 58h Serial Channel 0 Transmit Buffer Register (write only) 00h S0TIC b FF6Ch B6h Serial Channel 0 Transmit Interrupt Control Register 0000h SP FE12h 09h CPU System Stack Pointer Register FC00h SSPCON0 EF00h X --- SSP Control Register 0 0000h SSPCON1 EF02h X --- SSP Control Register 1 0000h SSPRTB EF04h X --- SSP Receive/Transmit Buffer XXXXh SSPTBH EF06h X --- SSP Transmit Buffer High XXXXh STKOV FE14h 0Ah CPU Stack Overflow Pointer Register FA00h STKUN FE16h 0Bh CPU Stack Underflow Pointer Register FC00h SYSCON b FF12h 89h CPU System Configuration Register 0xx0h2) T2 FE40h 20h GPT1 Timer 2 Register 0000h T2CON b FF40h A0h GPT1 Timer 2 Control Register 0000h T2IC b FF60h B0h GPT1 Timer 2 Interrupt Control Register 0000h T3 FE42h 21h GPT1 Timer 3 Register 0000h T3CON b FF42h A1h GPT1 Timer 3 Control Register 0000h T3IC b FF62h B1h GPT1 Timer 3 Interrupt Control Register 0000h T4 FE44h 22h GPT1 Timer 4 Register 0000h T4CON b FF44h A2h GPT1 Timer 4 Control Register 0000h T4IC b FF64h B2h GPT1 Timer 4 Interrupt Control Register 0000h T5 FE46h 23h GPT2 Timer 5 Register 0000h T5CON b FF46h A3h GPT2 Timer 5 Control Register 0000h T5IC b FF66h B3h GPT2 Timer 5 Interrupt Control Register 0000h T6 FE48h 24h GPT2 Timer 6 Register 0000h T6CON b FF48h A4h GPT2 Timer 6 Control Register 0000h T6IC b FF68h B4h GPT2 Timer 6 Interrupt Control Register 0000h TFR b FFACh D6h Trap Flag Register 0000h WDT FEAEh 57h Watchdog Timer Register (read only) 0000h WDTCON FFAEh D7h Watchdog Timer Control Register 000xh3) XP1IC b F18Eh E C7h SSP Interrupt Control Register 0000h XP3IC b F19Eh E CFh PLL unlock Interrupt Control Register 0000h ZEROS b FF1Ch 8Eh Constant Value 0’s Register (read only) 0000h 1. The value depends on the sili con revision and is given in the errata sheet. 2. The system configuration is selected during reset. 3. Bit WDTR indicates a watchdog timer triggered reset. Table 14 : Special Function Register List (continued) Name Physical Address 8-Bit Address Description Reset Value |
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