H8S2245 datasheet(37/818 Pages) RENESAS

37 / 818 page

Rev.3.00 Mar. 26, 2007 Page xxxvii of xlii

REJ09B0355-0300

Section 11 Watchdog Timer ............................................................................................. 387

11.1

Overview........................................................................................................................... 387

11.1.1 Features ................................................................................................................ 387

11.1.2 Block Diagram ..................................................................................................... 388

11.1.3 Pin Configuration................................................................................................. 389

11.1.4 Register Configuration......................................................................................... 389

11.2

Register Descriptions ........................................................................................................ 390

11.2.1 Timer Counter (TCNT)........................................................................................ 390

11.2.2 Timer Control/Status Register (TCSR) ................................................................ 390

11.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 392

11.2.4 Notes on Register Access..................................................................................... 394

11.3

Operation........................................................................................................................... 396

11.3.1 Watchdog Timer Operation ................................................................................. 396

11.3.2 Interval Timer Operation ..................................................................................... 398

11.3.3 Timing of Setting Overflow Flag (OVF) ............................................................. 399

11.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF) ......................... 400

11.4

Interrupts ........................................................................................................................... 400

11.5

Usage Notes ...................................................................................................................... 401

11.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 401

11.5.2 Changing Value of CKS2 to CKS0...................................................................... 401

11.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 402

11.5.4 System Reset by

WDTOVF Signal...................................................................... 402

11.5.5 Internal Reset in Watchdog Timer Mode............................................................. 402

11.5.6 OVF Flag Clearing in Interval Timer Mode ........................................................ 402

Section 12 Serial Communication Interface (SCI) .................................................... 403

12.1

Overview........................................................................................................................... 403

12.1.1 Features ................................................................................................................ 403

12.1.2 Block Diagram ..................................................................................................... 405

12.1.3 Pin Configuration................................................................................................. 406

12.1.4 Register Configuration......................................................................................... 407

12.2

Register Descriptions ........................................................................................................ 408

12.2.1 Receive Shift Register (RSR)............................................................................... 408

12.2.2 Receive Data Register (RDR) .............................................................................. 408

12.2.3 Transmit Shift Register (TSR) ............................................................................. 409

12.2.4 Transmit Data Register (TDR)............................................................................. 409

12.2.5 Serial Mode Register (SMR)................................................................................ 410

12.2.6 Serial Control Register (SCR).............................................................................. 413

12.2.7 Serial Status Register (SSR)................................................................................. 417

12.2.8 Bit Rate Register (BRR) ...................................................................................... 421

12.2.9 Smart Card Mode Register (SCMR) .................................................................... 430

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