H8S2245 datasheet(93/818 Pages) RENESAS

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Section 2 CPU

Rev.3.00 Mar. 26, 2007 Page 51 of 772

REJ09B0355-0300

(1) Register Direct—Rn

The register field of the instruction specifies an 8-, 16-, or 32-bit general register containing the

operand. R0H to R7H and R0L to R7L can be specified as 8-bit registers. R0 to R7 and E0 to E7

can be specified as 16-bit registers. ER0 to ER7 can be specified as 32-bit registers.

(2) Register Indirect—@ERn

The register field of the instruction code specifies an address register (ERn) which contains the

address of the operand on memory. If the address is a program instruction address, the lower 24

bits are valid and the upper 8 bits are all assumed to be 0 (H'00).

(3) Register Indirect with Displacement—@(d:16, ERn) or @(d:32, ERn)

A 16-bit or 32-bit displacement contained in the instruction is added to an address register (ERn)

specified by the register field of the instruction, and the sum gives the address of a memory

operand. A 16-bit displacement is sign-extended when added.

(4) Register Indirect with Post-Increment or Pre-Decrement—@ERn+ or @-ERn

• Register indirect with post-increment—@ERn+

The register field of the instruction code specifies an address register (ERn) which contains the

address of a memory operand. After the operand is accessed, 1, 2, or 4 is added to the address

access, 2 for word transfer instruction, or 4 for longword transfer instruction. For word or

longword transfer instruction, the register value should be even.

• Register indirect with pre-decrement—@-ERn

The value 1, 2, or 4 is subtracted from an address register (ERn) specified by the register field

in the instruction code, and the result becomes the address of a memory operand. The result is

also stored in the address register. The value subtracted is 1 for byte access, 2 for word transfer

instruction, or 4 for longword transfer instruction. For word or longword transfer instruction,

the register value should be even.

(5) Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32

The instruction code contains the absolute address of a memory operand. The absolute address

may be 8 bits long (@aa:8), 16 bits long (@aa:16), 24 bits long (@aa:24), or 32 bits long

(@aa:32).

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