H8S2245 datasheet(78/818 Pages) RENESAS

78 / 818 page

Section 2 CPU

Rev.3.00 Mar. 26, 2007 Page 36 of 772

REJ09B0355-0300

2.6

Instruction Set

2.6.1

Overview

The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function in

table 2.1.

Table 2.1

Instruction Classification

Function

Instructions

Size

Types

Data transfer

MOV

BWL

POP*

1, PUSH*1

LDM*

5, STM*5

MOVFPE*

3, MOVTPE*3

ADD, SUB, CMP, NEG

BWL

Arithmetic

operations

ADDX, SUBX, DAA, DAS

INC, DEC

BWL

ADDS, SUBS

MULXU, DIVXU, MULXS, DIVXS

EXTU, EXTS

TAS*

Logic operations

AND, OR, XOR, NOT

BWL

Shift

SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR

BWL

Bit manipulation

BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST, BAND,

BIAND, BOR, BIOR, BXOR, BIXOR

B14

Branch

Bcc*

2, JMP, BSR, JSR, RTS

—

System control

TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP —

Block data transfer

EEPMOV

—

Total: 65 types

Legend:

Byte size

W: Word size

Longword size

Notes: 1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn,

@-SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L

ERn, @-SP.

2. Bcc is the general name for conditional branch instructions.

3. Cannot be used in the H8S/2245 Group.

H8S2245 数据表(PDF) 78 Page - Renesas Technology Corp

H8S2245 数据表(HTML) 78 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载