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H8S2245 数据表(PDF) 85 Page - Renesas Technology Corp

部件名 H8S2245
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S2245 数据表(HTML) 85 Page - Renesas Technology Corp

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Section 2 CPU
Rev.3.00 Mar. 26, 2007 Page 43 of 772
REJ09B0355-0300
Table 2.5
Logic Operations Instructions
Instruction
Size*
Function
AND
B/W/L
Rd
∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
OR
B/W/L
Rd
∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
XOR
B/W/L
Rd
⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
NOT
B/W/L
¬ Rd
→ Rd
Takes the one's complement of general register contents.
Note:
*
Size refers to the operand size.
B:
Byte
W: Word
L:
Longword
Table 2.6
Shift Operations Instructions
Instruction
Size*
Function
SHAL
SHAR
B/W/L
Rd (shift)
→ Rd
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
SHLL
SHLR
B/W/L
Rd (shift)
→ Rd
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
ROTL
ROTR
B/W/L
Rd (rotate)
→ Rd
Rotates general register contents.
1-bit or 2-bit rotation is possible.
ROTXL
ROTXR
B/W/L
Rd (rotate)
→ Rd
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
Note:
*
Size refers to the operand size.
B:
Byte
W: Word
L:
Longword



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