H8S2245 datasheet(9/818 Pages) RENESAS

9 / 818 page

Rev.3.00 Mar. 26, 2007 Page ix of xlii

REJ09B0355-0300

Item

Page Revision (See Manual for Details)

3.4 Pin Functions in

Each Operating Mode

Table 3.3 Pin Functions

in Each Operating Mode

Port E description in mode 4 amended

(Before) P

*1/D

→ (After) P/D*1

5.1.2 Block Diagram

Figure 5.1 Block

Diagram

104

Figure 5.1 amended

(Before) IRQ input

→ (After) IRQ input

112

Figure 5.3 amended

(Before) IRQn input pin

→ (After) IRQn input pin

5.3.1 External Interrupts

Figure 5.3 Timing of

Setting IRQnF

Note added

Note: n = 7 to 0

5.5.1 Contention

between Interrupt

Generation and Disabling

126

Description amended

When an interrupt enable bit is cleared to 0 to disable interrupt

requests, the disabling becomes effective after execution of the

instruction. ...

5.5.3 Times when

Interrupts Are Disabled

127

Section 5.5.3 added

5.5.5 IRQ Interrupt

5.5.6 NMI Interrupt

Usage Notes

127,

128

Sections 5.5.5 and 5.5.6 added

6.3.6 Chip Select

Signals

Figure 6.3

CSn Signal

Output Timing (n = 0 to

150

Figure 6.3 title amended

6.4 Basic Timing to

6.4.3 External Address

Space Access Timing

150

153

Sections 6.4 to 6.4.3 added

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