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H8S2245 数据表(PDF) 33 Page - Renesas Technology Corp

部件名 H8S2245
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S2245 数据表(HTML) 33 Page - Renesas Technology Corp

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Rev.3.00 Mar. 26, 2007 Page xxxiii of xlii
REJ09B0355-0300
6.8.5
Usage Note........................................................................................................... 175
6.9
Bus Arbitration.................................................................................................................. 175
6.9.1
Overview.............................................................................................................. 175
6.9.2
Operation ............................................................................................................. 175
6.9.3
Bus Transfer Timing ............................................................................................ 176
6.9.4
External Bus Release Usage Note........................................................................ 176
6.10
Resets and the Bus Controller ........................................................................................... 176
Section 7 Data Transfer Controller................................................................................. 177
7.1
Overview........................................................................................................................... 177
7.1.1
Features ................................................................................................................ 177
7.1.2
Block Diagram ..................................................................................................... 178
7.1.3
Register Configuration......................................................................................... 179
7.2
Register Descriptions ........................................................................................................ 180
7.2.1
DTC Mode Register A (MRA) ............................................................................ 180
7.2.2
DTC Mode Register B (MRB)............................................................................. 182
7.2.3
DTC Source Address Register (SAR).................................................................. 183
7.2.4
DTC Destination Address Register (DAR) .......................................................... 183
7.2.5
DTC Transfer Count Register A (CRA) .............................................................. 184
7.2.6
DTC Transfer Count Register B (CRB)............................................................... 184
7.2.7
DTC Enable Registers (DTCER) ......................................................................... 185
7.2.8
DTC Vector Register (DTVECR) ........................................................................ 186
7.2.9
Module Stop Control Register (MSTPCR) .......................................................... 187
7.3
Operation........................................................................................................................... 187
7.3.1
Overview.............................................................................................................. 187
7.3.2
Activation Sources ............................................................................................... 189
7.3.3
DTC Vector Table................................................................................................ 191
7.3.4
Location of Register Information in Address Space ............................................ 194
7.3.5
Normal Mode ....................................................................................................... 195
7.3.6
Repeat Mode ........................................................................................................ 196
7.3.7
Block Transfer Mode ........................................................................................... 197
7.3.8
Chain Transfer ..................................................................................................... 199
7.3.9
Operation Timing................................................................................................. 200
7.3.10 Number of DTC Execution States........................................................................ 201
7.3.11 Procedures for Using DTC................................................................................... 203
7.3.12 Examples of Use of the DTC ............................................................................... 204
7.4
Interrupts ........................................................................................................................... 206
7.5
Usage Notes ...................................................................................................................... 206
Section 8 I/O Ports .............................................................................................................. 207
8.1
Overview........................................................................................................................... 207



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