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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S2245 数据表(PDF) 11 Page - Renesas Technology Corp |
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H8S2245 数据表(HTML) 11 Page - Renesas Technology Corp |
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11 / 818 page  Rev.3.00 Mar. 26, 2007 Page xi of xlii REJ09B0355-0300 Item Page Revision (See Manual for Details) 7.2.8 DTC Vector Register (DTVECR) 186 Bit figure amended 7 SWDTE 0 R/(W)*1 6 DTVEC6 0 R/(W)*2 5 DTVEC5 0 R/(W)*2 4 DTVEC4 0 R/(W)*2 3 DTVEC3 0 R/(W)*2 0 DTVEC0 0 R/(W)*2 2 DTVEC2 0 R/(W)*2 1 DTVEC1 0 R/(W)*2 Bit Initial value R/W : : : Notes 1 and 2 amended Notes: 1. A value of 1 can only be written to the SWDTE bit. 2. DTVEC6 to DTVEC0 bits can only be written when SWDTE = 0. Bit 7 DTC Software Activation Enable (SWDTE) Description deleted (Before) ... Enables or disables DTC activation by software. The SWDTE bit is cleared by writing 0 after reading 1. → (After) Enables or disables DTC activation by software. Condition 2 added [Clearing conditions] 1. When DISEL = 0 and ... 2. When 0 is written to the DISEL bit after a software-activated data transfer end interrupt (SWDTEND) request has been sent to the CPU. 7.3.2 Activation Sources 190 Description added ...The activation source flag, in the case of RXI0, for example, is the RDRF flag of SCI_0. As there are a number of activation sources, the activation source flag is not cleared with the last byte (or word) transfer. Take appropriate measures at each interrupt. 7.3.8 Chain Transfer 199 Description added ... Figure 7.9 shows the memory map for chain transfer. When activated, the DTC reads the register information start address stored at the vector address, which corresponds to the activation request, and then reads the first register information at that start address. After the data transfer, the CHNE bit will be tested. When it has been set to 1, DTC reads the next register information located in a consecutive area and performs the data transfer. These sequences are repeated until the CHNE bit is cleared to 0. |
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