H8SSLASH2218 datasheet(346/750 Pages) RENESAS

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Section 9 16-Bit Timer Pulse Unit (TPU)

Rev.6.00 Jun. 03, 2008 Page 298 of 698

REJ09B0074-0600

9.3.9

Timer Synchro Register (TSYR)

TSYR selects independent operation or synchronous operation for the channel 0 to 2 TCNT

counters. A channel performs synchronous operation when the corresponding bit in TSYR is set to

Bit

Bit Name Initial Value

R/W

Description

7 to

–

All 0

–

Reserved

The write value should always be 0.

SYNC2

SYNC1

SYNC0

R/W

Timer Synchro 2 to 0

These bits select whether operation is independent of or

synchronized with other channels.

When synchronous operation is selected, synchronous

presetting of multiple channels, and synchronous clearing

through counter clearing on another channel are possible.

To set synchronous operation, the SYNC bits for at least

two channels must be set to 1. To set synchronous

clearing, in addition to the SYNC bit, the TCNT clearing

source must also be set by means of bits CCLR2 to

CCLR0 in TCR.

0: TCNT_2 to TCNT_0 operates independently

(TCNT presetting /clearing is unrelated to other

channels)

1: TCNT_2 to TCNT_0 performs synchronous operation

TCNT synchronous presetting/synchronous clearing is

possible

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