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H8S/2218 数据表(PDF) 467 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 467 Page - Renesas Technology Corp

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Section 12 Serial Communication Interface
Rev.6.00 Jun. 03, 2008 Page 419 of 698
REJ09B0074-0600
12.6
Operation in Clocked Synchronous Mode
Figure 12.17 shows the general format for clocked synchronous communication. In clocked
synchronous mode, data is transmitted or received synchronous with clock pulses. In clocked
synchronous serial communication, data on the transmission line is output from one falling edge of
the serial clock to the next. In clocked synchronous mode, the SCI receives data in synchronous
with the rising edge of the serial clock. After 8-bit data is output, the transmission line holds the
MSB state. In clocked synchronous mode, no parity or multiprocessor bit is added. Inside the SCI,
the transmitter and receiver are independent units, enabling full-duplex communication through the
use of a common clock. Both the transmitter and the receiver also have a double-buffered
structure, so data can be read from or written during transmission or reception, enabling
continuous data transfer.
Don't care
Don't care
One unit of transfer data (character or frame)
Bit 0
Serial data
Synchronization
clock
Bit 1
Bit 3
Bit 4
Bit 5
LSB
MSB
Bit 2
Bit 6
Bit 7
*
*
Note: * High except in continuous transfer
Figure 12.17 Data Format in Synchronous Communication (For LSB-First)
12.6.1
Clock
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK pin can be selected, according to the setting of CKE0 and
CKE1 bits in SCR. When the SCI is operated on an internal clock, the serial clock is output from
the SCK pin. Eight serial clock pulses are output in the transfer of one character, and when no
transfer is performed the clock is fixed high.



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