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H8S/2218 数据表(PDF) 488 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 488 Page - Renesas Technology Corp |
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488 / 750 page  Section 12 Serial Communication Interface Rev.6.00 Jun. 03, 2008 Page 440 of 698 REJ09B0074-0600 12.9 Interrupts 12.9.1 Interrupts in Normal Serial Communication Interface Mode Table 12.12 shows the interrupt sources in normal serial communication interface mode. A different interrupt vector is assigned to each interrupt source, and individual interrupt sources can be enabled or disabled using the enable bits in SCR. When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DMAC to perform data transfer. The TDRE flag is cleared to 0 automatically when data is transferred by the DMAC. When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER, PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt request can activate the DMAC to transfer data. The RDRF flag is cleared to 0 automatically when data is transferred by the DMAC. A TEI interrupt is requested when the TEND flag is set to 1 and the TEIE bit is set to 1. If a TEI interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for acceptance. However, if the TDRE and TEND flags are cleared simultaneously by the TXI interrupt routine, the SCI cannot branch to the TEI interrupt routine later. Table 12.12 SCI Interrupt Sources Channel Name Interrupt Source Interrupt Flag DMAC Activation Priority* ERI0 Receive Error ORER, FER, PER Not possible High RXI0 Receive Data Full RDRF Possible TXI0 Transmit Data Empty TDRE Possible 0 TEI0 Transmission End TEND Not possible 2 ERI2 Receive Error ORER, FER, PER Not possible RXI2 Receive Data Full RDRF Not possible TXI2 Transmit Data Empty TDRE Not possible TEI2 Transmission End TEND Not possible Low Note: * This table shows the initial state immediately after a reset. The relative channel priorities can be changed by the interrupt controller. |
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