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H8S/2218 数据表(PDF) 225 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 225 Page - Renesas Technology Corp |
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225 / 750 page  Section 7 DMA Controller (DMAC) Rev.6.00 Jun. 03, 2008 Page 177 of 698 REJ09B0074-0600 7.4 Operation 7.4.1 Transfer Modes Table 7.2 lists the DMAC modes. Table 7.2 DMAC Transfer Modes Transfer Mode Transfer Source Remarks Short address mode Dual address mode (1) Sequential mode (2) Idle mode (3) Repeat Mode • TPU channel 0 to 2 compare match/input capture A interrupt • SCI transmission complete interrupt • SCI reception complete interrupt • A/D conversion end interrupt • Up to 4 channels can operate independently Full address mode (4) Normal mode • USB request • Auto-request • Max. 2-channel operation, combining channels A and B (5) Block transfer mode • TPU channel 0 to 2 compare match/input capture A interrupt • SCI transmission complete interrupt • SCI reception complete interrupt • A/D conversion end interrupt • With auto-request, burst mode transfer or cycle steal transfer can be selected |
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