SH7708 datasheet(190/633 Pages) RENESAS

190 / 633 page

172

Bits 1 and 0—Peripheral Clock Frequency Division Ratio (PFC1, PFC0): These bits specify the

division ratio of the peripheral clock frequency with respect to the frequency of the output

frequency of PLL circuit 1 or the frequency of the CKIO pin.

Bit 1: PFC1

Bit 0: PFC0

Description

× 1

× 1/2

× 1/4

(Initial value)

Setting prohibited (do not set)

Note:

Do not set the peripheral clock frequency higher than the frequency of the CKIO pin.

SH7708R:

Bit:

Bit name:

STC2

IFC2

PFC2

—

CKOEN

Initial value:

R/W:

R/W

Bit:

Bit name:

PLLEN

PSTBY

STC1

STC0

IFC1

IFC0

PFC1

PFC0

Initial value:

R/W:

R/W

Bits 15, 5 and 4—Frequency Multiplication Ratio (STC): These bits specify the frequency

multiplication ratio of PLL circuit 1.

Bit 15: STC2

Bit 5: STC1

Bit 4: STC0

Description

000

× 1

(Initial value)

001

× 2

100

× 3

110

× 4

Note:

Do not set the output frequency of PLL circuit 1 higher than 100MHz.

Bits 14, 3 and 2—Internal Clock Frequency Division Ratio (IFC): These bits specify the frequency

division ratio of the internal clock with respect to the output frequency of PLL circuit 1. When

PLL circuit 1 is off or in standby mode, set

× 1.

SH7708 数据表(PDF) 190 Page - Renesas Technology Corp

SH7708 数据表(HTML) 190 Page - Renesas Technology Corp

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