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H8/3003 数据表(PDF) 444 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 444 Page - Renesas Technology Corp |
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444 / 715 page ![]() 13.1.3 Input/Output Pins The SCI has serial pins for each channel as listed in table 13-1. Table 13-1 SCI Pins Channel Name Abbreviation I/O Function 0 Serial clock pin SCK0 Input/output SCI0 clock input/output Receive data pin RxD0 Input SCI0 receive data input Transmit data pin TxD0 Output SCI0 transmit data output 1 Serial clock pin SCK1 Input/output SCI1 clock input/output Receive data pin RxD1 Input SCI1 receive data input Transmit data pin TxD1 Output SCI1 transmit data output 13.1.4 Register Configuration The SCI has internal registers as listed in table 13-2. These registers select asynchronous or synchronous mode, specify the data format and bit rate, and control the transmitter and receiver sections. Table 13-2 Registers Channel Address*1 Name Abbreviation R/W Initial Value 0 H'FFB0 Serial mode register SMR R/W H'00 H'FFB1 Bit rate register BRR R/W H'FF H'FFB2 Serial control register SCR R/W H'00 H'FFB3 Transmit data register TDR R/W H'FF H'FFB4 Serial status register SSR R/(W)*2 H'84 H'FFB5 Receive data register RDR R H'00 1 H'FFB8 Serial mode register SMR R/W H'00 H'FFB9 Bit rate register BRR R/W H'FF H'FFBA Serial control register SCR R/W H'00 H'FFBB Transmit data register TDR R/W H'FF H'FFBC Serial status register SSR R/(W)*2 H'84 H'FFBD Receive data register RDR R H'00 Notes: 1. Lower 16 bits of the address. 2. Only 0 can be written, to clear flags. 426 |
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