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H8/3003 数据表(PDF) 447 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 447 Page - Renesas Technology Corp |
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447 / 715 page ![]() 13.2.5 Serial Mode Register (SMR) SMR is an 8-bit register that specifies the SCI serial communication format and selects the clock source for the baud rate generator. The CPU can always read and write SMR. SMR is initialized to H'00 by a reset and in standby mode. Bit Initial value Read/Write 7 C/A 0 R/W 6 CHR 0 R/W 5 PE 0 R/W 4 O/E 0 R/W 3 STOP 0 R/W 0 CKS0 0 R/W 2 MP 0 R/W 1 CKS1 0 R/W Communication mode Selects asynchronous or synchronous mode Clock select 1/0 These bits select the baud rate generator’s clock source Character length Selects character length in asynchronous mode Parity enable Selects whether a parity bit is added Parity mode Selects even or odd parity Stop bit length Selects the stop bit length Multiprocessor mode Selects the multiprocessor function 429 |
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