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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3003 数据表(PDF) 446 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 446 Page - Renesas Technology Corp |
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446 / 715 page  13.2.3 Transmit Shift Register (TSR) TSR is the register that transmits serial data. The SCI loads transmit data from TDR into TSR, then transmits the data serially from the TxD pin, LSB (bit 0) first. After transmitting one data byte, the SCI automatically loads the next transmit data from TDR into TSR and starts transmitting it. If the TDRE flag is set to 1 in SSR, however, the SCI does not load the TDR contents into TSR. The CPU cannot read or write TSR directly. 13.2.4 Transmit Data Register (TDR) TDR is an 8-bit register that stores data for serial transmission. When the SCI detects that TSR is empty, it moves transmit data written in TDR from TDR into TSR and starts serial transmission. Continuous serial transmission is possible by writing the next transmit data in TDR during serial transmission from TSR. The CPU can always read and write TDR. TDR is initialized to H'FF by a reset and in standby mode. Bit Initial value Read/Write 7 — 6 — 5 — 4 — 3 — 0 — 2 — 1 — Bit Initial value Read/Write 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 0 1 R/W 2 1 R/W 1 1 R/W 428 |
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