H8SLASH3003 datasheet(459/715 Pages) RENESAS

459 / 715 page

Bit 1—Multiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data

when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit and cannot

be written.

Bit 1

MPB

Description

Multiprocessor bit value in receive data is 0*

(Initial value)

Multiprocessor bit value in receive data is 1

Note: * If the RE bit is cleared to 0 when a multiprocessor format is selected, MPB retains its

previous value.

Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to

transmit data when a multiprocessor format is selected for transmitting in asynchronous mode.

The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not selected,

or when the SCI is not transmitting.

Bit 0

MPBT

Description

Multiprocessor bit value in transmit data is 0

(Initial value)

Multiprocessor bit value in transmit data is 1

13.2.8 Bit Rate Register (BRR)

BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in SMR that select the baud

rate generator clock source, determines the serial communication bit rate.

The CPU can always read and write BRR. BRR is initialized to H'FF by a reset and in standby

mode. The two SCI channels have independent baud rate generator control, so different values can

be set in the two channels.

Table 13-3 shows examples of BRR settings in asynchronous mode. Table 13-4 shows examples

of BRR settings in synchronous mode.

Bit

Initial value

Read/Write

R/W

441

H8/3003 数据表(PDF) 459 Page - Renesas Technology Corp