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H8/3003 数据表(PDF) 683 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 683 Page - Renesas Technology Corp |
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683 / 715 page ![]() BRCR—Bus Release Control Register H'F3 Bus controller ISCR—IRQ Sense Control Register H'F4 Interrupt controller IER—IRQ Enable Register H'F5 Interrupt controller Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 BRLE 0 R/W 2 — 1 — 1 — 1 — Bus release enable 0 The bus cannot be released to an external device 1 The bus can be released to an external device Bit Initial value Read/Write 7 IRQ7SC 0 R/W 6 IRQ6SC 0 R/W 5 IRQ5SC 0 R/W 4 IRQ4SC 0 R/W 3 IRQ3SC 0 R/W 2 IRQ2SC 0 R/W 1 IRQ1SC 0 R/W 0 IRQ0SC 0 R/W IRQ to IRQ sense control 0 Interrupts are requested when IRQ to IRQ inputs are low 1 Interrupts are requested by falling-edge input at IRQ to IRQ 70 7 7 0 0 Bit Initial value Read/Write 7 IRQ7E 0 R/(W) 6 IRQ6E 0 R/(W) 5 IRQ5E 0 R/(W) 4 IRQ4E 0 R/(W) 3 IRQ3E 0 R/(W) 2 IRQ2E 0 R/(W) 1 IRQ1E 0 R/(W) 0 IRQ0E 0 R/(W) IRQ to IRQ enable 0 IRQ to IRQ interrupts are disabled 1 IRQ to IRQ interrupts are enabled 70 7 7 0 0 665 |
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