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H8/3003 数据表(PDF) 685 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 685 Page - Renesas Technology Corp |
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685 / 715 page  IPRA—Interrupt Priority Register A H'F8 Interrupt controller • Interrupt sources controlled by each bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 IPRA7 IPRA6 IPRA5 IPRA4 IPRA3 IPRA2 IPRA1 IPRA0 Interrupt IRQ0 IRQ1 IRQ2, IRQ4 to WDT, ITU ITU ITU source IRQ3 IRQ7 Refresh chan- chan- chan- Con- nel 0 nel 1 nel 2 troller IPRB—Interrupt Priority Register B H'F9 Interrupt controller • Interrupt sources controlled by each bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 IPRB7 IPRB6 IPRB5 IPRB4 IPRB3 IPRB2 IPRB1 — Interrupt ITU ITU DMAC DMAC SCI SCI A/D — source chan- chan- group group chan- chan- con- nel 3 nel 4 0 1 nel 0 nel 1 verter Bit Initial value Read/Write 7 IPRA7 0 R/W 6 IPRA6 0 R/W 5 IPRA5 0 R/W 4 IPRA4 0 R/W 3 IPRA3 0 R/W 0 IPRA0 0 R/W 2 IPRA2 0 R/W 1 IPRA1 0 R/W Priority level A7 to A0 0 Priority level 0 (low priority) 1 Priority level 1 (high priority) Bit Initial value Read/Write 7 IPRB7 0 R/W 6 IPRB6 0 R/W 5 IPRB5 0 R/W 4 IPRB4 0 R/W 3 IPRB3 0 R/W 0 IPRB0 0 R/W 2 IPRB2 0 R/W 1 IPRB1 0 R/W Priority level B7 to B0 0 Priority level 0 (low priority) 1 Priority level 1 (high priority) Reserved bit 667 |
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