H8SLASH3003 datasheet(199/715 Pages) RENESAS

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8.2.2 I/O Address Registers (IOAR)

An I/O address register (IOAR) is an 8-bit readable/writable register that specifies a source or

destination address. The IOAR value is the lower 8 bits of the address. The upper 16 address bits

are all 1 (H'FFFF).

An IOAR functions as a source or destination address register depending on how the DMAC is

activated: as a source address register if activation is by a receive-data-full interrupt from the SCI,

and as a destination address register otherwise.

The IOAR value is held fixed. It is not incremented or decremented when a transfer is executed.

The IOARs are not initialized by a reset or in standby mode.

8.2.3 Execute Transfer Count Registers (ETCR)

An execute transfer count register (ETCR) is a 16-bit readable/writable register that specifies the

number of transfers to be executed. These registers function in one way in I/O mode and idle

mode, and another way in repeat mode.

•

I/O mode and idle mode

In I/O mode and idle mode, ETCR functions as a 16-bit counter. The count is decremented by

1 each time one transfer is executed. The transfer ends when the count reaches H'0000.

Bit

Initial value

Read/Write

R/W

Source or destination address

Undetermined

Bit

Initial value

Read/Write

R/W

Transfer counter

Undetermined

R/W

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H8/3003 数据表(PDF) 199 Page - Renesas Technology Corp