H8SLASH3003 datasheet(279/715 Pages) RENESAS

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9.8 Port A

9.8.1 Overview

Port A is an 8-bit input/output port that is also used for output (TP7 to TP0) from the

programmable timing pattern controller (TPC), input and output (TIOCB2, TIOCA2, TIOCB1,

TIOCA1, TIOCB0, TIOCA0, TCLKD, TCLKC, TCLKB, TCLKA) by the 16-bit integrated timer-

pulse unit (ITU), and output (TEND1, TEND0) from the DMA controller (DMAC). Port A has the

same set of pin functions in all operating modes. Figure 9-11 shows the pin configuration of

port A.

Pins in port A can drive one TTL load and a 30-pF capacitive load. They can also drive a

darlington transistor pair. Port A has Schmitt-trigger inputs.

Figure 9-11 Port A Pin Configuration

9.8.2 Register Descriptions

Table 9-13 summarizes the registers of port A.

Table 9-13 Port A Registers

Address*

Name

Abbreviation

R/W

Initial Value

H'FFD1

Port A data direction register

PADDR

H'00

H'FFD3

Port A data register

PADR

R/W

H'00

Note: * Lower 16 bits of the address.

Port A

PA (input/output)/TP (output)/TIOCB (input/output)

PA (input/output)/TP (output)/TIOCA (input/output)

PA (input/output)/TP (output)/TIOCB (input/output)

Port A pins

PA (input/output)/TP (output)/TIOCA (input/output)

PA (input/output)/TP (output)/TIOCB (input/output)/TCLKD (input)

PA (input/output)/TP (output)/TIOCA (input/output)/TCLKC (input)

PA (input/output)/TP (output)/TEND (output)/TCLKB (input)

PA (input/output)/TP (output)/TEND (output)/TCLKA (input)

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